October 26-27, 2021
Virtual Conference

October 26-27, 2021 | Virtual

Mark Your Calendars

Important Dates

March 1, 2021

Submission Site Opens

April 26, 2021

Submission Deadline

Call for Submissions

The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation or integration. It is a place where the latest methodologies and technologies for the industrial use of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.

The conference covers the application of standards, methodologies, and flows for system-level, hardware and software design, verification, validation, design automation and IP reuse.

Industry applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to advanced design and verification on special interest areas such as Digital Twin, Machine Learning, Internet-of-things, Functional safety and security, AI, ADAS and digitalization.

DVCon Europe 2021 accepts submissions of papers, tutorials and panels with highly technical content reflecting real life experiences.  

Example Topics

System-Level & System Design

  • Virtual prototyping and Digital Twins
  • Transaction-level modeling (e.g., SystemC TLM)
  • Hardware-assisted prototyping
  • Hardware/software/embedded co-design
  • Machine Learning

Verification & Validation

  • Verification process, reuse and resource management
  • Methods bridging between verification and validation
  • Hardware/software co-verification
  • Advanced methodologies, test benches, and flows
    (e.g., UVM, HDLs, HVLs)
  • Formal and semi-formal V&V techniques 

Functional Safety & Security

  • Methods and flows for functional safety standard compliance (e.g., ISO 26262, DO-254)
  • Safety and security in verification and validation
  • Requirements-driven design and verification including traceability
  • New methods and tools supporting functional safety and security

Model-Based & Model-Supported Software Design

  • Software for verification
  • Software development and verification
  • Model based software design
  • Low level software design and verification
  • Model based tools and techniques for application level software  

IP Reuse
& Design Automation

  • High-level synthesis from ESL languages
  • Interoperability of models and/or tools
  • IP tagging, protection or security
  • SoC and IP integration methods, flows, and tools
  • Configuration management of IPs including different abstraction level
  • Flow and tool automation (e.g., IP-XACT)

Mixed-Signal & Low-Power Design & Verification

  • AMS modeling for concept and system-level design
  • Application of mixed-signal extensions in verification
    (e.g., UVM-MS)
  • Real-number modeling approaches
  • Self-checking testbenches in analog verification
  • Low-power design and verification (e.g., UPF)  

Photo Gallery

From Previous Years

Special Thanks

Conference Sponsors

Global Sponsors

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